Signal Integrity Hardware Engineer, Everpure Platform

Pure Storage

Santa Clara, California

Full Time

Posted April 21, 2026

$175k - $263k

Not Specified

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Job Description

The role involves owning high-speed signal integrity analysis, simulation, measurement, and collaboration for enterprise SSD hardware, ensuring robust design and performance through technical expertise and cross-functional teamwork.

Key Responsibilities

Own high-speed signal integrity analysis, simulation, and measurement for SSD hardware from architecture through production.
Drive board-level SI decisions, including PCB material selection, via structures, loss tradeoffs, stackup definition, and channel optimization.
Perform SI simulations such as insertion loss, return loss, crosstalk, and impedance profiling.
Lead TDR and S-parameter measurements, including setup, calibration, and de-embedding.
Perform 3D-EM extraction and simulation for vias, connectors, and complex channel structures.
Correlate simulation results with lab measurements to refine models and design assumptions.
Use and customize IBIS and IBIS-AMI models for PCIe, NAND, and DDR channel analysis.
Conduct high-speed signal eye diagram and margin analysis.
Support debug activities related to signal integrity issues.
Collaborate with cross-functional teams to ensure robust SI solutions.
Document SI design guidelines and best practices.

Requirements

5 years of experience in Signal Integrity engineering for high-speed systems.
Bachelor's degree in Electrical or Computer Engineering.
Strong SI simulation experience, must-have for PCIe channel analysis, including experience with simulation of eye diagrams, jitter, and margin analysis.
Hands-on TDR and S-parameter measurement experience, including measurement setup, calibration, and de-embedding.
Deep experience with 3D-EM extraction and simulation using Simbeor for vias, connectors, and complex channel structures.
Strong understanding of PCB design from an SI perspective, including materials, stackups, and via structures.
Ability to perform and interpret SI simulations including Insertion Loss (IL), Return Loss (RL), crosstalk, and TDR impedance profiles.
Ability to correlate simulation results with lab measurements to refine models and design assumptions.
Experience with using and customizing IBIS and IBIS-AMI models for PCIe, NAND, and DDR channel analysis.
Ability to perform high-speed signal eye diagram and margin analysis.
Experience supporting debug activities where SI is a contributing factor.
Ability to collaborate cross-functionally with PCB design, system, firmware, mechanical, and test teams to ensure robust SI solutions.
Ability to document SI design guidelines and best practices for scalable, repeatable designs.
Highly self-motivated with the ability to work autonomously in a fast-paced, technical development environment.
Experience working in and leading cross-functional teams.
Excellent teamwork and collaboration skills.