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Senior Hardware Engineer

Pure Storage
Santa Clara, California
Full Time
Posted February 13, 2026
$175k - $263k
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Job Description

This role involves leading the design, development, and validation of high-performance, scalable storage hardware systems, collaborating across engineering teams to ensure reliability and robustness for demanding data environments.

Key Responsibilities

  • Lead the development and design of high-performance storage hardware from initial architecture to production.
  • Drive the full product development lifecycle, including schematic capture, PCB layout, and integration of complex architectures.
  • Design, implement, and automate hardware validation and qualification tests to ensure performance and reliability standards.
  • Conduct root cause and failure analysis on hardware issues using high-speed testing tools.
  • Optimize system integrity through power, signal, and thermal analysis to ensure high-speed interface performance under peak loads.

Requirements

  • Experience leading the full product development lifecycle for high-performance storage hardware, including schematic capture, PCB layout, and integration of complex x86 architectures and high-speed bus technologies.
  • Proficiency in designing, implementing, and automating sophisticated hardware validation and qualification tests such as eDVT and system stress testing to ensure performance and reliability standards are met.
  • Ability to conduct deep-dive root cause and failure analysis on hardware issues using high-speed oscilloscopes and bus analyzers, and to harden systems against real-world failures and customer escalations.
  • Experience in optimizing system integrity through auditing and refining device-level power, signal integrity (SI), and thermal functionality, ensuring high-speed interfaces like PCIe and Ethernet up to 800Gbps operate flawlessly under peak loads.
  • Expert-level command of hardware design tools for schematic capture and PCB layout.
  • Deep understanding of x86 architecture and high-speed signal integrity (SI) routing and analysis.
  • Proven ability to architect complex compute, storage, and I/O systems, with hands-on experience qualifying subcomponents such as SSDs, AC/DC power supplies, and VR circuits.
  • Fluency in developing automated test environments using Python or Bash to streamline hardware configuration and validation processes.
  • Advanced knowledge of major bus technologies including PCIe, I2C, SPI, and high-speed Ethernet standards, with the ability to analyze protocol traces and electrical functionality at the component level.
  • Ability and willingness to work onsite at the Santa Clara, CA office in accordance with company policies.

Benefits & Perks

Salary range: 175,000 - 263,000 USD
Work environment: primarily in-office at Santa Clara, CA
Perks: flexible time off, wellness resources, company-sponsored team events
Additional benefits: potential incentive pay and/or equity

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