PCIe Validation Architect SSD

Pure Storage

Santa Clara, California

Full Time

Posted April 21, 2026

$211k - $317k

Energy Storage

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Job Description

The role involves leading the development and validation of PCIe and NVMe storage solutions, ensuring high-performance, compliance, and reliability of SSD products through architectural design, testing, automation, and root-cause analysis within a data storage environment.

Key Responsibilities

Lead the development of SSD validation suites focusing on PCIe features, compliance, and failure recovery scenarios.
Define test framework requirements and integrate validation suites and tools for PCIe validation.
Manage drive qualification processes across the product portfolio, including test planning and failure analysis.
Automate testing cycles and develop new qualification tests using scripting and CI/CD pipelines.
Lead root-cause analysis of complex failures using PCIe analyzers and collaborate with cross-functional teams to resolve issues.

Requirements

Proven track record in PCIe fundamentals, including experience with Gen5 Gen6 validation using high-speed oscilloscopes, protocol analyzers, and exercisers.
Deep knowledge of NVMe storage interface protocols and PCIe compliance testing to qualify drives at the electrical, protocol, and functional levels.
Strong software development skills, specifically with Python, and hands-on experience navigating Jenkins and GIT CI/CD pipelines.
Demonstrated ability to lead test architecture and successful qualification of SSD products within an enterprise data storage environment.
Experience managing drive qualification across a product portfolio by developing test plans, conducting deep-dive failure analysis, and guiding stakeholder expectations based on data results.
Ability to direct the global drive qualification team in developing comprehensive SSD validation suites focused on PCIe features, compliance, and complex failure recovery scenarios.
Ability to define test framework requirements to integrate standardized validation suites and complex toolsets, serving as a mentor and technical leader for PCIe validation.
Decisive, detail-oriented approach to hardware and firmware debugging, with strong communication skills to present results and propose solutions across technical forums.
Work from the Santa Clara, CA office in compliance with company policies, unless on PTO, work travel, or other approved leave.