The role involves leading hardware architecture and validation for exascale storage solutions, focusing on designing energy-efficient systems, troubleshooting complex hardware issues, and collaborating across teams to deliver innovative storage products for AI workloads.
Key Responsibilities
Architect the hardware foundation for exascale storage solutions supporting AI workloads
Lead hardware strategy, including selection, validation, and productization of storage sub-systems
Perform root-cause analysis for hardware escalations and system failures to support system hardening
Design and implement automated hardware validation ecosystems to accelerate testing and ensure quality
Collaborate with cross-functional teams and external vendors to integrate next-generation sub-systems into products
Requirements
Proven hardware leadership experience in x86 architectures, with mastery of hardware design and a demonstrated ability to lead the qualification of high-speed interfaces, signal integrity, and functional protocols at an enterprise level.
Demonstrated success in architecting and automating large-scale hardware qualification processes, specifically for x86 subcomponents, NVMe storage, and complex power delivery systems.
Deep technical command of rack-scale integration, including high-speed networking fabrics and power distribution, to ensure seamless interoperability within massive, complex data center environments.
Proficiency in Python and BASH scripting to build scalable, intelligent test frameworks that streamline engineering workflows and reduce manual intervention.
Technical leadership in hardware design, including experience in architecting energy-efficient systems for exascale and AI workloads, and guiding external vendors from initial concept through sustained production.
Experience in orchestrating the end-to-end selection, validation, and productization of storage sub-systems, ensuring platforms meet rigorous qualification standards for exascale and AI workloads.
Ability to lead root-cause analysis efforts for complex hardware escalations and testbed failures, and coordinate analysis efforts with external partners to support system hardening and customer needs.
Deep technical knowledge of system integration, including high-speed networking fabrics and power distribution, to ensure seamless interoperability within large data center environments.
Proficiency in designing and implementing sophisticated, automated hardware validation ecosystems to accelerate time-to-market while maintaining quality.
Experience in acting as a technical liaison between Engineering, Product Management, Operations, and Manufacturing to integrate next-generation sub-systems into product portfolios.
Ability to work from the Santa Clara, CA office in accordance with company policies, unless on PTO, work travel, or other approved leave.
Benefits & Perks
Annual base salary range of 211,000 - 350,000 USD
Potential eligibility for incentive pay and/or equity
In-office work environment in Santa Clara, CA
Flexible time off
Wellness resources
Company-sponsored team events
Support for accommodations for candidates with disabilities
Inclusive and diverse work culture
Ready to Apply?
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