The role involves leading the integration and optimization of Design-For-Test architecture in LiDAR System-on-Chips to enhance testing efficiency and reliability for autonomous sensing applications.
Key Responsibilities
Integrate and optimize Design-For-Test architecture in LiDAR SoCs
Requirements
Experience in integrating and optimizing Design-For-Test (DFT) architecture in System-on-Chip (SoC) designs, specifically for LiDAR sensors.
Proven ability to lead the integration and optimization of DFT architectures in complex semiconductor designs.
Strong understanding of semiconductor design and testing methodologies relevant to LiDAR technology.
Experience working with silicon photonics chip integration and related SoC components.
Ability to collaborate with cross-functional teams to implement DFT strategies in LiDAR SoC development.