This role involves leading the design, development, and validation of high-performance, reliable storage hardware systems, from architecture to production, ensuring they meet demanding performance and scalability standards in enterprise environments.
Key Responsibilities
Lead the development of high-performance storage hardware from architecture to production.
Design and develop hardware components, including schematic capture, PCB layout, and integration of complex architectures.
Lead hardware validation and automate testing processes to ensure performance and reliability standards are met.
Conduct root cause analysis and failure analysis on hardware issues to improve system robustness.
Optimize system integrity through power, signal, and thermal analysis to ensure high-speed interface functionality.
Requirements
Lead the evolution of Everpure's high-performance systems from initial architecture to global production, collaborating across Engineering, Operations, and JDM partners.
Design and develop hardware for next-generation storage hardware, including schematic capture, PCB layout, and integration of complex x86 architectures and high-speed bus technologies.
Lead Hardware Validation Design by implementing and automating sophisticated validation and qualification tests such as eDVT and system stress testing to ensure performance and reliability standards are met.
Conduct deep-dive root cause and failure analysis (FA) on hardware issues using high-speed oscilloscopes and bus analyzers to harden systems against real-world failures and customer escalations.
Optimize system integrity by auditing and refining device-level power, signal integrity (SI), and thermal functionality, ensuring high-speed interfaces like PCIe and Ethernet up to 800Gbps operate flawlessly under peak loads.
Work from the Santa Clara, CA office in an in-office environment in compliance with company policies, unless on PTO, work travel, or other approved leave.
Possess expert-level command of hardware design tools for schematic capture and PCB layout.
Have a deep understanding of x86 architecture and high-speed signal integrity (SI) routing and analysis.
Proven ability to architect complex compute, storage, and I/O systems, with hands-on experience qualifying subcomponents such as SSDs, AC/DC power supplies, and VR circuits.
Develop automated test environments using Python or Bash to streamline hardware configuration and validation processes.
Possess advanced knowledge of major bus technologies including PCIe, I2C, SPI, and high-speed Ethernet standards, with the ability to analyze protocol traces and electrical functionality at the component level.
Benefits & Perks
Annual base salary range of 180,000 - 326,000 USD
Potential eligibility for incentive pay and/or equity
Flexible time off
Wellness resources
Company-sponsored team events
Accommodations for candidates with disabilities
Supportive growth and development environment
Recognition as a Fortune's Best Workplace in Technology and Bay Area
Inclusive and diverse workplace culture
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