The role involves leading the development, troubleshooting, and validation of high-performance PCIe, NVMe, and SMBus interfaces for advanced storage solutions, providing technical mentorship, and ensuring product quality in a fast-paced, innovative environment.
Key Responsibilities
Own and resolve issues related to PCIe, NVMe, and SMBus interfaces through triage, root cause analysis, and resolution.
Develop and update validation and test plans for PCIe, NVMe, and SMBus during chip bring-up and regression testing.
Lead failure analysis and investigations to support field issues and customer escalations.
Requirements
Over 5 years of experience in advanced interface issue troubleshooting, root cause analysis, and solution identification, encompassing complex system-level interactions across host, PCIe, and CXL interfaces in enterprise server and SSD environments.
Developed and automated comprehensive validation and testing solutions.
BS in Electrical or Computer Engineering or related field.
Proven track record in chip bring-up and product qualification.
Hands-on experience with PCIe Gen5 and Gen6 interfaces.
Proficient with test equipment including PCIe analyzer, Exerciser or Jammer, I2C analyzer, and UART.
Experience with PCIe compliance testing SIG for SSD products.
Proficient in scripting with Python, BASH, and similar languages.
Hands-on experience in a Linux environment.
Ability to own and drive the triage, root cause, and resolution of issues raised by internal teams, manufacturing, and JDMs.
Ability to guide the development of PCIe, NVMe, and SMBus validation test plans for early phase chip bring-up and regression testing throughout the development cycle.
Ability to lead failure analysis and root cause investigations to support field issues and customer escalations.
Detail-oriented, analytical, process-driven, and customer-focused.
Excellent verbal and written communication skills.
Benefits & Perks
Flexible time off
Wellness resources
Company-sponsored team events
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