As a PCIe Hardware System Engineer, you will spearhead the technical success and reliability of our next-generation data storage solutions within the region. Operating at the intersection of cutting-edge hardware and firmware, you will lead high-impact issue resolution and product validation to ensure our systems maintain their industry-leading performance and energy efficiency. In this pivotal role, you will serve as the primary on-the-ground technical anchor, collaborating directly with Taiwan-based JDM/ODM partners, SSD suppliers, and enterprise customers to turn complex technical challenges into seamless product deployments.
• Drive Technical Resolution: Own and lead the end-to-end triage, failure analysis, and root cause investigation for complex PCIe Gen5/Gen6 and NVMe system-level issues, ensuring rapid resolution for manufacturing, vendors, and customers.
• Forge Strategic Partner Collaborations: Act as the primary on-site technical interface at vendor and customer facilities across Taiwan, driving alignment and solving high-escalation interface challenges with key SSD suppliers and flash-controller partners.
• Architect Validation Frameworks: Guide the development and execution of robust PCIe, NVMe, and SMBus validation test plans for early-phase chip bring-up and continuous regression testing across the entire development lifecycle.
• Innovate with Automation: Leverage Python scripting and modern AI/automation tools to optimize issue-triaging workflows and enhance hardware validation efficiency.
• Champion Local Technical Leadership: Provide self-directed engineering ownership across time zones, mitigating risks before they escalate, while mentoring junior engineers as our local hardware presence expands.
• Deep Hardware Interface Expertise: Comprehensive mastery of advanced interface troubleshooting, system-level interactions (host, PCIe, and CXL), and hands-on validation of PCIe Gen5/Gen6 protocols within enterprise server or SSD environments.
• Advanced Diagnostic & Tool Proficiency: Practical expertise utilizing critical hardware test equipment—including PCIe protocol analyzers, exercisers, jammers, I2C/SMBus tools, and Linux-based Python scripting for test automation.
• Cross-Functional HW/FW Problem Solving: A strong technical foundation at the hardware-firmware boundary, allowing you to confidently debug NVMe features, SSD firmware behaviors, and PCIe LTSSM states during complex failure analysis.
• Global Partner & Communication Fluency: Exceptional bilingual communication skills in Mandarin and English, with a proven track record of independently managing technical relationships with Taiwan-based ODM/JDM partners and suppliers.
• Location: We are primarily an in-office environment and therefore, you will be expected to work from the Taiwan office in compliance with Pure’s policies, unless you are on PTO, or work travel, or other approved leave.