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Job Description
The role involves leading the integration and optimization of Design-For-Test architecture in LiDAR System-on-Chip (SoC) devices to enhance testing efficiency and reliability for autonomous sensing applications.
Key Responsibilities
- Integrate and optimize Design-For-Test architecture in LiDAR SoCs
Requirements
- Experience in integrating and optimizing Design-For-Test (DFT) architecture in SoCs (System on Chips).
- Proficiency in designing and implementing DFT strategies specifically for LiDAR sensor systems or similar high-performance integrated circuits.
- Strong understanding of test architecture development, including scan chain design, test pattern generation, and fault coverage analysis.
- Ability to collaborate with design teams to incorporate DFT features into the chip design process.
- Experience in optimizing DFT architectures to improve test coverage, reduce test time, and minimize area overhead.
- Knowledge of silicon photonics integration and the specific requirements for LiDAR sensor chips is preferred.
- Educational background in Electrical Engineering, Computer Engineering, or a related field (specific degree requirements not explicitly stated but implied for technical expertise).
Benefits & Perks
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