Strong hands-on development and coding skills in C++ and Python.
Solid foundations in distributed systems, high availability (HA), storage architectures, hardware lifecycle, or embedded/platform software.
Demonstrated experience designing state machines, workflow orchestration, health checks, error handling, and operator guidance for critical systems.
Exceptional debugging skills across multi-layered system boundaries, spanning software, hardware, and distributed services in reliability-sensitive environments.
Experience establishing test strategies, automated validation across hardware/software combinations, and working with CI/CD tools such as Jenkins.
Strong written and verbal communication skills with a proven track record of driving cross-functional alignment across technical partners.
Willingness to work on-site in Santa Clara, CA, to engage directly with hardware, lab environments, and local team members.
Familiarity with storage protocols and architecture (NVMe, iSCSI, PCIe, NUMA), HA failover design, array controller replacement dynamics, or server/CPU hardware architecture is a plus.
#LI-REMOTE, #LI-ONSITE
Salary ranges are determined based on role, level and location. For positions open to candidates in multiple geographical locations, the base salary range is reflective of the labor market across the applicable locations.
This role may be eligible for incentive pay and/or equity.
There is no application deadline and we accept applications on an ongoing basis until the job is filled.
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