Principal Hardware Engineer
Pure StorageSanta Clara, California
Full Time
Posted May 4, 2026
$217k - $359k
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Job Description
$217,000
Key Responsibilities
- As a key contributor on our System Hardware Development team, you will drive the end-to-end architecture, validation, and quality of enterprise-class storage hardware systems that power mission-critical data environments. You will bridge complex engineering concepts with real-world deployment by leading cross-functional alignment across internal engineering, Joint Development Manufacturing (JDM) partners, operations, and support teams. In this role, your technical leadership ensures unmatched system reliability, performance, and scalability across our next-generation storage portfolio while establishing design methodologies that accelerate product innovation.
- Drive Next-Generation Hardware Architecture & Design : Lead schematic capture, high-speed PCB layout, signal integrity analysis, and x86 system-level co-development alongside JDM partners to deliver scalable, high-performance enterprise storage platforms from concept through production.
- Architect Comprehensive Qualification & Automation Frameworks : Oversee functional specifications and automated stress testing environments—leveraging Linux, Python, PCIe, DDR, Ethernet, and serial bus protocols—to guarantee sub-system reliability and accelerate time-to-market.
- Champion Cross-Functional Hardware Operations & System Hardening : Partner with Manufacturing, Operations, and Escalation teams to streamline production handoffs for new storage sub-systems and perform deep root-cause failure analysis that permanently hardens enterprise products.
- Establish Quality-by-Design Standards & Best Practices : Define hardware validation methodologies, collaborate across organizational boundaries, and build engineering networks that continuously elevate quality benchmarks across all product development lifecycles.
Requirements
- Enterprise Hardware & x86 Architecture Mastery : Expertise in x86 system architecture, high-speed PCB design layout, signal integrity analysis, schematic capture, and major bus technologies (PCIe, DDR, Ethernet, I2C, SPI) to independently validate enterprise hardware at electrical, protocol, and functional levels.
- Advanced System Testing & Automation : Ability to design and automate system-level stress tests (using Linux environments, Python/BASH scripting, PTU, LinPack, and IOmeter) and utilize high-speed oscilloscopes and bus analyzers to perform complex signal and protocol trace analysis.
- Cross-Functional Leadership & Complex Problem Solving : Capability to lead root-cause failure analysis on complex technical issues, establish engineering best practices, and collaborate effectively with internal teams and external manufacturing partners to deliver production-ready systems.
- Hardware Logic & Diagnostic Fundamentals : Solid understanding of Verilog and CPLD design concepts combined with a rigorous, quality-focused mindset for hardware design and system-level troubleshooting.
- We are primarily an in-office environment and therefore, you will be expected to work from the Santa Clara, CA office in compliance with Everpure’s policies, unless you are on PTO, or work travel, or other approved leave.
- #LI-ONSITE
- Salary ranges are determined based on role, level and location. For positions open to candidates in multiple geographical locations, the base salary range is reflective of the labor market across the applicable locations.
- This role may be eligible for incentive pay and/or equity.
- There is no application deadline and we accept applications on an ongoing basis until the job is filled.
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